Ab Initio Control of a SPAD Sensor Using an AVR-Controlled External Datapath: \\ A Replicable Table-Top Architecture for Long-Horizon Quantum Computation

Vision and Long-Term Motivation

The motivating vision for this work is the eventual construction of a table-top ion-trap quantum computer. Such a system is fundamentally constrained not by abstract algorithms but by timing, control fidelity, measurement latency, noise coupling, and the classical-quantum interface. In operational ion-trap systems, the majority of engineering effort is devoted not to qubits themselves but to deterministic sequencing, real-time classical feedback, and the reliable interpretation of stochastic measurement outcomes.

The present research therefore begins far upstream of trapped ions. It asks a more primitive but foundational question: how much control, determinism, and interpretability can be achieved when one deliberately refuses modern abstractions and instead reconstructs the control stack from first principles? In particular, what are the consequences of separating the control plane from the data plane as explicitly as possible, and what pathologies emerge when the host controller is slow, resource-limited, and fully transparent?

A SPAD (single-photon avalanche diode) sensor serves as a stand-in for a quantum measurement device. An AVR microcontroller serves as a deliberately constrained classical controller. External SRAM and an external ALU are introduced not to improve performance, but to externalize computation and memory so that their interactions with timing and control can be directly observed.

Organization of the Work

Herein we provide a structured overview of the document, listing each section and appendix with a concise description.

• 2 Philosophical and Architectural Commitments – Outlines guiding principles: ab initio control, visibility, separation of planes, replicability.

• 3 Choice of the AVR as Control Sequencer – Justifies AVR selection for its limitations and transparency in orchestration.

• 4 SPAD Sensor as a Quantum-Analog Measurement Device – Treats SPAD as a surrogate quantum measurement interface.

• 5 Initial Ab Initio Bring-Up Strategy – Describes first experiments with register-level control and timing.

• 6 Motivation for Externalizing Memory – Explains use of external SRAM to separate control state from experimental state.

• 7 Motivation for an External ALU – Details rationale for discrete ALU to make computation physically visible.

• 8 SPAD-to-ALU Data Path – Establishes direct photon data flow to ALU via shift registers.

• 9 Bus Ownership and Isolation – Discusses tri-state buffers and explicit bus contention management.

• 10 Why the System Is Slow and Fragile by Design – Emphasizes fragility as a deliberate pedagogical and architectural choice.

• 11 Mapping to Ion-Trap Quantum Computing – Draws analogies between classical surrogate system and ion-trap control stack.

• 12 Replicability in 25 Years – States design choices for long-horizon reproducibility.

• 13 Conclusion – Summarizes the epistemic value of explicit control and datapath separation.

• Appendix A: Photographic Documentation – Provides visual records of hardware layout and wiring practices.

  • A Overall Table-Top Arrangement – Captures spatial relationships and grounding topology.

  • B Datapath and Control Detail – Shows detailed view of datapath and control wiring.

  • C Notes on Long-Term Archival Value – Advises on preserving images and metadata for replicability.

• Appendix B: Interpretation Through Correspondence Principle and Classical-Quantum Boundary – Situates architecture within Bohr’s and Zurek’s frameworks.

  • D Bohr's Correspondence Principle as a Design Constraint – Frames classical describability as a design requirement.

  • E Why Slowness Does Not Violate Correspondence – Argues that transparency outweighs speed in correspondence.

  • F Zurek's Decoherence and Emergence of Classical Records – Connects external SRAM to explicit record creation.

  • G The Classical-Quantum Boundary as an Architectural Interface – Treats boundary as a designed interface, not hidden abstraction.

  • H Control as a Classical Observer – Positions AVR as observer of classical records, not quantum events.

  • I Implications for Long-Term Replicability – Notes theoretical grounding ensures intelligibility across decades.

  • J Conclusion – Synthesizes correspondence and decoherence perspectives on the architecture.

• Appendix C: Arduino Firmware – Archives verbatim firmware used in the experiment.

  • K Notes on Compilation and Context – Records toolchain and board details affecting timing.

  • L Arduino Sketch (Verbatim Listing) – Provides full source code of the firmware.

  • M Archival Guidance – Advises on preserving original files and versioning.

• References and Bibliography – Lists scholarly and technical sources supporting the work.

Philosophical and Architectural Commitments

Several commitments guide the work documented here:

• Ab initio control: All meaningful behavior should be derivable from documented register writes, explicit timing, and observable state transitions. Vendor libraries are treated as opaque artifacts to be avoided or, at minimum, decomposed.

• Visibility over performance: Slowness and fragility are acceptable if they preserve interpretability.

• Explicit separation of planes: Control, data movement, computation, and storage are implemented as physically and conceptually distinct subsystems.

• Long-horizon replicability: Every assumption that depends on contemporary tooling, availability, or convention is made explicit so that it may be reconstructed decades later.

These commitments intentionally mirror those found in successful quantum-control platforms, where hidden automation often becomes an obstacle to diagnosis and trust.

Choice of the AVR as Control Sequencer

The ATmega328P-class AVR microcontroller was chosen not because it is powerful, but because it is not. Its limitations—2 KB of internal SRAM, no DMA, no cache, no memory management unit, and a Harvard architecture with strict separation of code and data—make it an ideal instrument for studying architectural boundaries.

Crucially, the AVR cannot execute code from external memory and cannot transparently extend its stack or heap beyond internal SRAM. These limitations force an explicit acknowledgment of where control logic resides and where data must flow. In the context of this research, the AVR is not treated as a computer in the conventional sense, but as a deterministic sequencer: a device whose primary role is to orchestrate timing, bus ownership, and state transitions.

SPAD Sensor as a Quantum-Analog Measurement Device

The SPAD sensor, exemplified by devices such as the TMF8820 class, integrates a complex internal system: a SPAD array, quenching circuitry, time-to-digital converters, histogram accumulation logic, and often an embedded sequencer or firmware engine. From the perspective of this research, the SPAD is treated as a black-box quantum-analog measurement device whose exposed interface consists of:

• Power and reset behavior

• A serial control and data interface (typically I{2}C)

• A register map of varying completeness

• Observable outputs in the form of photon counts or histograms

Ab initio control, in this context, does not mean control of individual avalanche events. It means establishing a complete and testable understanding of the mapping between register-level configuration, timing, and observable photon statistics.

Initial Ab Initio Bring-Up Strategy

The initial phase of work focused on determining whether meaningful photon data could be obtained without relying on vendor-provided firmware abstractions. This involved:

1. Verifying power and reset sequencing using only minimal delays and direct register reads.

2. Probing register stability across time to infer autonomous internal activity.

3. Attempting to halt or quiesce acquisition to test the degree of internal autonomy.

4. Performing single-shot acquisitions with minimal integration windows.

A key observation during this phase was the appearance of flat or saturated photon counts under certain host-side timing conditions, suggesting that host starvation and readout latency could masquerade as physical saturation. This observation motivated the architectural decoupling that followed.

Motivation for Externalizing Memory

The AVR's internal SRAM is insufficient for storing large photon histograms, intermediate buffers, or extended experimental state. More importantly, its scarcity makes it difficult to distinguish between memory pressure artifacts and genuine sensor behavior.

External SRAM is therefore introduced not as a transparent extension of AVR memory, but as an explicitly separate storage substrate. A parallel SRAM (e.g., 62256-class) is chosen over serial alternatives to avoid reintroducing serialization overhead and to preserve the conceptual clarity of a shared data bus.

The AVR does not treat this SRAM as part of its address space. All reads and writes are explicitly sequenced and controlled, reinforcing the distinction between internal control state and external experimental state.

Motivation for an External ALU

Introducing an external ALU is perhaps the most conceptually unusual aspect of the setup. Modern microcontrollers integrate arithmetic tightly with control flow, making it difficult to separate the cost and timing of computation from that of orchestration.

By moving even simple arithmetic operations (such as accumulation of photon counts) into an external ALU constructed from discrete logic (e.g., 74HC283 adders or a 74HC181 ALU), computation becomes:

• Physically visible

• Explicitly clocked or strobed

• Decoupled from the control sequencer's internal state

This mirrors the structure of many quantum-control systems, where fast classical logic (often implemented in FPGA fabric) performs thresholding or accumulation independently of a slower experiment controller.

SPAD-to-ALU Data Path

A central architectural goal is that photon data should reach the ALU without ever being stored in, or manipulated by, the AVR's registers. This is achieved by interposing a deserialization stage between the SPAD's serial interface and the parallel ALU.

In practice, this takes the form of a serial-in, parallel-out shift register (e.g., 74HC595) whose outputs feed the ALU operands. The AVR's role is restricted to providing clock and latch signals, defining when a word is considered valid, and sequencing subsequent operations. The data bits themselves never enter AVR memory.

This design choice enforces a strict separation between control and data planes and allows latency, jitter, and contention to be studied directly.

Bus Ownership and Isolation

Because multiple devices (shift registers, ALU outputs, SRAM) may need to drive a shared data bus, explicit bus isolation is required. Bidirectional tri-state buffers (e.g., 74HC245) are used to ensure that at any given time, only one device asserts the bus.

Bus ownership is treated as a first-class control problem. The AVR sequences enable signals explicitly, and bus contention is treated as an observable failure mode rather than an abstract error.

Why the System Is Slow and Fragile by Design

The resulting system is orders of magnitude slower than what could be achieved with integrated MCUs or FPGAs. Signal integrity is sensitive, debugging is manual, and failure modes are numerous. This is not accidental.

In quantum instrumentation, particularly in ion-trap systems, similar fragility appears at the boundaries between analog physics, fast classical logic, and slow supervisory control. By encountering these issues in a classical setting, the researcher develops an intuition that transfers directly to future quantum systems.

Mapping to Ion-Trap Quantum Computing

The architectural correspondence is direct:

The present work therefore serves as a classical surrogate for the control challenges inherent in quantum computing.

Replicability in 25 Years

To ensure replicability over a 25-year horizon, several principles are followed:

• Use of generic logic families (74HC series) likely to remain available or emulable.

• Avoidance of undocumented vendor firmware where possible.

• Explicit documentation of timing assumptions and control sequences.

• Conceptual designs that can be reimplemented in alternative technologies (e.g., FPGA) without loss of intent.

Even if specific components become unavailable, the architectural roles they play should remain clear.

Conclusion

This document has described not a finished system, but a deliberately constrained and exposed research apparatus. By insisting on ab initio control, explicit datapaths, and visible timing, the work establishes a foundation for understanding the classical control problems that dominate practical quantum computing.

The value of the system lies not in its performance, but in the clarity with which it reveals where computation, control, and measurement meet. That clarity is intended to persist, and to remain useful, long after the specific components described here have become historical curiosities.

Appendix A: Photographic Documentation of the Current Experimental Setup

This appendix provides placeholders for photographic records of the current hardware implementation. These photographs are intended to serve as historical and technical references, capturing physical layout, wiring practices, component proximity, and scale. They are not illustrative embellishments; they are primary experimental artifacts.

The photographs should be updated whenever a significant architectural change is made. Each image should be accompanied, in future revisions, by a short caption describing what is visible, what is intentionally omitted, and what failure modes or constraints the photograph helps contextualize.

Overall Table-Top Arrangement

This image is intended to preserve spatial relationships that are often lost in schematics, including unintended coupling paths, wire lengths, and grounding topology.

Datapath and Control Detail

This image gives another view.

Notes on Long-Term Archival Value

For long-term replicability, original-resolution image files should be archived alongside this document, with filenames matching those referenced above. Metadata such as date, camera type, and any deviations from the documented architecture should be preserved externally or embedded in accompanying notes.

In the event that specific components become obsolete, these photographs should allow a future researcher to infer functional roles even when part numbers are no longer meaningful.

Appendix B: Interpretation of the Architecture Through the Correspondence Principle and the Classical–Quantum Boundary

This appendix situates the work described in the main text within two foundational conceptual frameworks of quantum theory: Niels Bohr’s correspondence principle and Wojciech Zurek’s decoherence-based account of the classical–quantum (C–Q) boundary. The purpose of this discussion is not philosophical ornamentation, but clarification of intent. The present architecture is deliberately classical, yet it is designed to probe questions that arise precisely at the interface where classical control encounters quantum measurement. Understanding this positioning is essential if the system is to remain intelligible and useful decades into the future.

Bohr’s Correspondence Principle as a Design Constraint

Bohr’s correspondence principle is often summarized as the requirement that quantum mechanics reproduce classical physics in the appropriate limits. Less commonly emphasized, but more relevant here, is Bohr’s insistence that experimental descriptions must ultimately be expressed in classical terms. Measurement outcomes, apparatus configurations, timing relationships, and control actions are all articulated in the language of classical physics, even when the underlying phenomena are quantum.

The architecture described in the main text internalizes this requirement as an explicit design constraint. The AVR microcontroller, external ALU, and SRAM are not merely convenient tools; they constitute the classical descriptive framework within which any future quantum experiment must be embedded. By refusing to blur control, computation, and measurement into a monolithic abstraction, the system enforces a separation that mirrors Bohr’s epistemic boundary: the quantum system may behave nonclassically, but the apparatus that prepares, probes, and records it must remain classically intelligible.

In this sense, the SPAD sensor functions as a correspondence object. It produces discrete detection events—photon counts—that are inherently probabilistic at the microscopic level, yet are accumulated, thresholded, and interpreted using entirely classical operations. The external ALU and SRAM serve as the arena in which quantum-derived randomness is transformed into classical records. This transformation is not hidden inside a vendor ASIC or firmware blob; it is laid bare as a sequence of explicit, clocked operations.

Why Slowness Does Not Violate Correspondence

A superficial reading of the correspondence principle might suggest that increasing classical fidelity requires increasing speed, precision, or integration. The present work adopts the opposite stance. Slowness is embraced because it allows the classical description to remain explicit. Each control signal, bus transaction, and timing delay is observable and accountable.

From a correspondence perspective, this is not a deficiency but a virtue. Classical physics is not defined by speed, but by determinism and describability. The AVR-based sequencer, despite its limited performance, satisfies these criteria more transparently than a highly integrated modern system. It therefore provides a more faithful correspondence framework for future quantum experiments, where hidden latencies or undocumented behavior can undermine interpretability.

Zurek’s Decoherence and the Emergence of Classical Records

Zurek’s formulation of decoherence reframes the classical–quantum boundary not as a sharp divide, but as an emergent phenomenon arising from the interaction of a quantum system with its environment. In this view, classicality is selected through the proliferation of stable, redundant records—a process Zurek terms quantum Darwinism.

The relevance of this framework to the present architecture lies in the explicit construction of record-making machinery. Photon detections in the SPAD are ephemeral quantum events. They become classical facts only when they are copied, stored, and made robust against further interaction. The external SRAM, populated through deterministic control signals, is a literal instantiation of this process. Each stored count is a classical record that has survived interaction with a noisy environment and been stabilized by macroscopic degrees of freedom.

By externalizing memory and computation, the architecture makes the act of record creation explicit. One can point to the exact moment when a quantum-derived signal is latched, when it is added to an accumulator, and when it is written into nonvolatile experimental history. This is not merely an implementation detail; it is an operational definition of the C–Q boundary.

The Classical–Quantum Boundary as an Architectural Interface

In many modern experimental systems, the classical–quantum boundary is buried inside firmware, FPGA bitstreams, or proprietary hardware. The present work instead treats the boundary as an interface to be designed, tested, and reasoned about.

The decision to route SPAD data directly to an external ALU, bypassing the AVR’s internal registers, is particularly significant in this context. It ensures that the first stage of classical post-processing occurs outside the general-purpose controller. This mirrors practices in advanced quantum experiments, where fast classical logic performs thresholding or state discrimination before higher-level control software becomes involved.

From Zurek’s perspective, this arrangement reduces ambiguity about where decoherence has become effectively irreversible. The ALU and SRAM constitute the first macroscopic environment in which the measurement outcome is redundantly encoded. The AVR, acting as a slower supervisory agent, interacts only with already-classical information.

Control as a Classical Observer

Both Bohr and Zurek emphasize, in different ways, the role of the observer. In this architecture, the AVR sequencer plays that role, but in a constrained and disciplined fashion. It does not observe quantum events directly; it observes classical records produced by the datapath. Its ignorance of the underlying microscopic details is intentional.

This separation guards against a common conceptual error: conflating the controller with the measurement. By treating the AVR as an observer of records rather than events, the system aligns with the decoherence view that classical observers access only stable, environment-selected states.

Implications for Long-Term Replicability

Situating the architecture within these theoretical frameworks strengthens its claim to long-term relevance. The correspondence principle and decoherence are not transient ideas tied to specific technologies; they are structural features of how quantum theory interfaces with the classical world. An apparatus designed to make these structures explicit is therefore more likely to remain intelligible even as components, programming languages, and fabrication techniques change.

A future researcher reconstructing this system need not believe the same interpretations of quantum mechanics to benefit from the design. The apparatus encodes, in hardware and timing, a disciplined stance on where quantum behavior ends and classical control begins. That stance is legible, testable, and adaptable.

Conclusion

Viewed through the lens of Bohr’s correspondence principle, the system described in the main text is an exercise in preserving classical describability in the face of quantum-derived data. Viewed through Zurek’s decoherence framework, it is an explicit construction of the machinery that turns microscopic events into macroscopic records.

The architecture’s slowness, modularity, and transparency are therefore not historical accidents or pedagogical crutches. They are deliberate choices that align the experiment with the deepest structural insights we have about the relationship between the quantum world and the classical apparatus we use to interrogate it. As such, they serve the long-term vision not merely of building a device, but of sustaining understanding.

Appendix C: Arduino Firmware Used in the Current Experimental Setup

This appendix contains the exact Arduino sketch (.ino file) used in the most recent experimental configuration described in the main text. The firmware is included verbatim to preserve behavior, timing assumptions, register access patterns, and control flow.

The sketch is treated as a primary experimental artifact. No attempt is made here to optimize, refactor, or modernize the code. Any inefficiencies, redundancies, or limitations are part of the documented state of the system and should be preserved when replicating the experiment.

Notes on Compilation and Context

The firmware was compiled using the Arduino toolchain targeting an ATmega328P-class microcontroller. Clock speed, compiler version, and board support package may affect timing-sensitive behavior and should be recorded alongside this document in future revisions.

The code below is included exactly as used, without editorial modification. Comments present in the original file are retained.

Arduino Sketch (Verbatim Listing)

[language=C++,basicstyle=\ttfamily\small,breaklines=true]
#include <Wire.h>

// ---------------- TMF8820 Minimal Setup ----------------
#define TMF8820_ADDR 0x41
#define SYSRESULT_RANGE_RAW 0x0400
#define SYS__START 0x0002
#define SYS__FRESH_OUT_OF_RESET 0x0000  // Reset register

// I2C helpers
void writeRegister16(uint16_t reg, uint16_t value) {
  Wire.beginTransmission(TMF8820_ADDR);
  Wire.write(reg >> 8);
  Wire.write(reg & 0xFF);
  Wire.write(value >> 8);
  Wire.write(value & 0xFF);
  Wire.endTransmission();
}

uint16_t readRegister16(uint16_t reg) {
  Wire.beginTransmission(TMF8820_ADDR);
  Wire.write(reg >> 8);
  Wire.write(reg & 0xFF);
  Wire.endTransmission(false);

  Wire.requestFrom(TMF8820_ADDR, (uint8_t)2);
  return (Wire.read() << 8) | Wire.read();
}

// Minimal TMF8820 initialization
void initTMF8820() {
  // 1. Reset device
  writeRegister16(SYS__FRESH_OUT_OF_RESET, 0x0001);
  delay(5);  // small delay for reset

  // 2. Start continuous ranging mode (single-shot if desired)
  writeRegister16(SYS__START, 0x0001);
  delay(5);  // give time for first integration
}

// ---------------- Laser + LDR Setup ----------------
const int ldrPin = A0;
const int laserPin = 9;
const int buttonPin = 2;

int ldrValue = 0;
int targetLightLevel = 500;
int laserPower = 0;
float kp = 0.5;
unsigned long lastUpdate = 0;

// ---------------- Setup ----------------
void setup() {
  Wire.begin();
  Serial.begin(9600);

  pinMode(laserPin, OUTPUT);
  pinMode(buttonPin, INPUT_PULLUP);

  Serial.println("UNO Quantum Illumination + Laser Control Ready");

  initTMF8820();  // Initialize TMF8820

  Serial.println("TMF8820 initialized (minimal mode)");
}

// ---------------- Loop ----------------
void loop() {
  // Read LDR
  ldrValue = analogRead(ldrPin);

  // Read TMF8820 photon count
  uint16_t photonCount = readRegister16(SYSRESULT_RANGE_RAW);

  // Check serial commands
  if (Serial.available() > 0) {
    String command = Serial.readStringUntil('\n');
    processCommand(command);
  }

  // Button manual override
  if (digitalRead(buttonPin) == LOW) {
    manualControl();
  }

  // Closed-loop control (every 100 ms)
  if (millis() - lastUpdate >= 100) {
    updateLaserPower();
    lastUpdate = millis();
  }

  // Send all sensor data
  sendSensorData(photonCount);

  delay(50); // small delay for stability
}

// ---------------- Command Processing ----------------
void processCommand(String command) {
  command.trim();

  if (command.startsWith("SET_TARGET")) {
    targetLightLevel = command.substring(11).toInt();
    targetLightLevel = constrain(targetLightLevel, 0, 1023);
    Serial.print("Target set to: ");
    Serial.println(targetLightLevel);
  }
  else if (command.startsWith("SET_KP")) {
    kp = command.substring(8).toFloat();
    Serial.print("Kp set to: ");
    Serial.println(kp);
  }
  else if (command.startsWith("MANUAL")) {
    laserPower = command.substring(7).toInt();
    laserPower = constrain(laserPower, 0, 255);
    analogWrite(laserPin, laserPower);
    Serial.print("Manual power set to: ");
    Serial.println(laserPower);
  }
}

// ---------------- Laser Control ----------------
void updateLaserPower() {
  int error = targetLightLevel - ldrValue;
  int powerAdjustment = error * kp;

  laserPower += powerAdjustment;
  laserPower = constrain(laserPower, 0, 255);

  analogWrite(laserPin, laserPower);
}

void manualControl() {
  static int manualPower = 0;
  manualPower = (manualPower + 51) 
  analogWrite(laserPin, manualPower);

  Serial.print("Manual override: ");
  Serial.println(manualPower);

  delay(500); // debounce
}

// ---------------- Data Reporting ----------------
void sendSensorData(uint16_t photonCount) {
  Serial.print("LDR:");
  Serial.print(ldrValue);
  Serial.print(",TARGET:");
  Serial.print(targetLightLevel);
  Serial.print(",POWER:");
  Serial.print(laserPower);
  Serial.print(",KP:");
  Serial.print(kp);
  Serial.print(",PHOTONS:");
  Serial.println(photonCount);
}

Archival Guidance

For long-term preservation, the original .ino file should be archived as a plain-text artifact alongside this document. The filename sketch_dec29a.ino, Arduino IDE version [Arduino IDE Version: 2.3.6 Date: 2025-04-09T11:26:55.498Z (8 months ago) CLI Version: 1.2.0 Copyright © 2025 Arduino SA], and target board definition [Arduino Uno on COM6] should be recorded externally or appended in future revisions of this appendix.

Any subsequent firmware changes should result in a new appendix revision rather than modification of this listing, so that the evolution of control logic remains traceable over time.